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[/] [zipcpu/] [trunk/] [doc/] - Rev 163

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Rev Log message Author Age Path
163 Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set!		 dgisselq 2868d 08h /zipcpu/trunk/doc/
162 Noted 64-bit integers are by extension, as are vector instructions. dgisselq 2868d 09h /zipcpu/trunk/doc/
161 Initial version of the ORConf slides, showing only the initial CPU survey. dgisselq 2868d 09h /zipcpu/trunk/doc/
153 Adds internal link functionality to the specification document format. dgisselq 2883d 20h /zipcpu/trunk/doc/
139 Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details.		 dgisselq 2923d 06h /zipcpu/trunk/doc/
107 Adding a missing file. dgisselq 2975d 22h /zipcpu/trunk/doc/
106 Updated to allow building without the sources for the graphics used in the
document.		 dgisselq 2976d 01h /zipcpu/trunk/doc/
92 Adjustments made to match the simplified early branching. dgisselq 3021d 22h /zipcpu/trunk/doc/
85 Minor update/correction to operand B definition. dgisselq 3047d 21h /zipcpu/trunk/doc/
79 Adjusted the opcodes for NOOP, BREAK, and LOCK. dgisselq 3052d 01h /zipcpu/trunk/doc/
78 Found/corrected annoying bug in floating point documentation of the opcode
table.		 dgisselq 3052d 01h /zipcpu/trunk/doc/
73 Documentations updates. dgisselq 3053d 00h /zipcpu/trunk/doc/
72 Some updated graphics, now containing images of the CPU that include the
divide and (currently non-existant) floating point unit.		 dgisselq 3053d 00h /zipcpu/trunk/doc/
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.		 dgisselq 3059d 04h /zipcpu/trunk/doc/
68 Updated specification, includes well illustrated pipeline discussion. dgisselq 3094d 05h /zipcpu/trunk/doc/
67 Includes timing diagrams in support of a very descriptive specification section. dgisselq 3094d 05h /zipcpu/trunk/doc/
49 Final set of changes finishing the Dhrystone package. Dhrystone, as
implemented by hand in assembly, now works.		 dgisselq 3139d 23h /zipcpu/trunk/doc/
47 Added some new graphics, includes the file for the Zip Bones system. dgisselq 3139d 23h /zipcpu/trunk/doc/
39 Here's the documentation update to support the pipelined read/writes of
the bus from the CPU, as well as the test file that proved they worked.		 dgisselq 3143d 02h /zipcpu/trunk/doc/
37 Fixed some minor spelling errors. dgisselq 3151d 19h /zipcpu/trunk/doc/

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