| Rev |
Log message |
Author |
Age |
Path |
| 163 |
Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set! |
dgisselq |
2879d 22h |
/zipcpu/trunk/doc |
| 162 |
Noted 64-bit integers are by extension, as are vector instructions. |
dgisselq |
2879d 23h |
/zipcpu/trunk/doc |
| 161 |
Initial version of the ORConf slides, showing only the initial CPU survey. |
dgisselq |
2879d 23h |
/zipcpu/trunk/doc |
| 153 |
Adds internal link functionality to the specification document format. |
dgisselq |
2895d 10h |
/zipcpu/trunk/doc |
| 139 |
Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details. |
dgisselq |
2934d 20h |
/zipcpu/trunk/doc |
| 107 |
Adding a missing file. |
dgisselq |
2987d 12h |
/zipcpu/trunk/doc |
| 106 |
Updated to allow building without the sources for the graphics used in the
document. |
dgisselq |
2987d 15h |
/zipcpu/trunk/doc |
| 92 |
Adjustments made to match the simplified early branching. |
dgisselq |
3033d 12h |
/zipcpu/trunk/doc |
| 85 |
Minor update/correction to operand B definition. |
dgisselq |
3059d 11h |
/zipcpu/trunk/doc |
| 79 |
Adjusted the opcodes for NOOP, BREAK, and LOCK. |
dgisselq |
3063d 15h |
/zipcpu/trunk/doc |
| 78 |
Found/corrected annoying bug in floating point documentation of the opcode
table. |
dgisselq |
3063d 15h |
/zipcpu/trunk/doc |
| 73 |
Documentations updates. |
dgisselq |
3064d 14h |
/zipcpu/trunk/doc |
| 72 |
Some updated graphics, now containing images of the CPU that include the
divide and (currently non-existant) floating point unit. |
dgisselq |
3064d 14h |
/zipcpu/trunk/doc |
| 69 |
This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture. |
dgisselq |
3070d 18h |
/zipcpu/trunk/doc |
| 68 |
Updated specification, includes well illustrated pipeline discussion. |
dgisselq |
3105d 19h |
/zipcpu/trunk/doc |
| 67 |
Includes timing diagrams in support of a very descriptive specification section. |
dgisselq |
3105d 19h |
/zipcpu/trunk/doc |
| 49 |
Final set of changes finishing the Dhrystone package. Dhrystone, as
implemented by hand in assembly, now works. |
dgisselq |
3151d 13h |
/zipcpu/trunk/doc |
| 47 |
Added some new graphics, includes the file for the Zip Bones system. |
dgisselq |
3151d 13h |
/zipcpu/trunk/doc |
| 39 |
Here's the documentation update to support the pipelined read/writes of
the bus from the CPU, as well as the test file that proved they worked. |
dgisselq |
3154d 16h |
/zipcpu/trunk/doc |
| 37 |
Fixed some minor spelling errors. |
dgisselq |
3163d 09h |
/zipcpu/trunk/doc |
| 36 |
*Lots* of changes to increase processing speed and remove pipeline stalls.
Removed the useless flash cache, replacing it with a proper DMA controller.
"make test" in the main directory now runs a test program in Verilator and
reports on the results. |
dgisselq |
3163d 21h |
/zipcpu/trunk/doc |
| 35 |
I updated the system diagram to reflect the new version that has a direct
memory access controller, rather than the (useless) manual cache. |
dgisselq |
3180d 12h |
/zipcpu/trunk/doc |
| 33 |
Finally finished a first draft of the full specification! |
dgisselq |
3192d 15h |
/zipcpu/trunk/doc |
| 32 |
Updated the document to match the most recent changes to the CPU. Specifically,
these include the re-instatement of the full SUB command with immediate offset,
and ... others I cannot remember.
The new document also describes what conditions create pipeline stalls,
together with how many cycles each stall condition will create. |
dgisselq |
3192d 22h |
/zipcpu/trunk/doc |
| 24 |
Lots more changes to the spec. It's still not done, but it is more complete
than before. |
dgisselq |
3195d 23h |
/zipcpu/trunk/doc |
| 23 |
Oops -- left some portions of the RTC Clock spec in with the ZIP CPU spec.
These were quickly removed. |
dgisselq |
3197d 19h |
/zipcpu/trunk/doc |
| 22 |
|
dgisselq |
3197d 19h |
/zipcpu/trunk/doc |
| 21 |
This update adds an incomplete version of the specification for the chip.
I ned to come back to this and do a lot more writing, but it is a start. |
dgisselq |
3197d 19h |
/zipcpu/trunk/doc |
| 10 |
Here's the watchdog timer code, as well as some pictures of the register
set. |
dgisselq |
3218d 12h |
/zipcpu/trunk/doc |
| 8 |
Fixed the rotate left instruction to work in the zasm parser, and to be
properly referenced in the simulator. The instruction set documentation was
also adjusted to reflect what the CPU actually does. |
dgisselq |
3218d 19h |
/zipcpu/trunk/doc |
