OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [doc] - Rev 199

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.
dgisselq 2740d 20h /zipcpu/trunk/doc
190 Added the copyright statement back in. dgisselq 2758d 19h /zipcpu/trunk/doc
189 Final, as delivered, ORCONF slides. dgisselq 2758d 19h /zipcpu/trunk/doc
173 Adjusted the pdfinfo field, to accommodate Google's bot. dgisselq 2790d 22h /zipcpu/trunk/doc
170 Minor updates to the orconf.pdf pre-conference slide. (Added the 'to be
revealed' line.
dgisselq 2802d 22h /zipcpu/trunk/doc
169 Added details of LM32 to the (pre) ORConf survey slide in trunk/doc. dgisselq 2838d 22h /zipcpu/trunk/doc
167 Updated the spec to reflect changes in the CC register: the user break
flag, and the ability to command a clearing of the instruction cache.
dgisselq 2851d 22h /zipcpu/trunk/doc
164 Updated with inputs from Hellwig Geisse regarding the details of the ECO32
CPU.
dgisselq 2860d 04h /zipcpu/trunk/doc
163 Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set!
dgisselq 2868d 06h /zipcpu/trunk/doc
162 Noted 64-bit integers are by extension, as are vector instructions. dgisselq 2868d 06h /zipcpu/trunk/doc
161 Initial version of the ORConf slides, showing only the initial CPU survey. dgisselq 2868d 07h /zipcpu/trunk/doc
153 Adds internal link functionality to the specification document format. dgisselq 2883d 18h /zipcpu/trunk/doc
139 Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details.
dgisselq 2923d 03h /zipcpu/trunk/doc
107 Adding a missing file. dgisselq 2975d 20h /zipcpu/trunk/doc
106 Updated to allow building without the sources for the graphics used in the
document.
dgisselq 2975d 23h /zipcpu/trunk/doc
92 Adjustments made to match the simplified early branching. dgisselq 3021d 20h /zipcpu/trunk/doc
85 Minor update/correction to operand B definition. dgisselq 3047d 19h /zipcpu/trunk/doc
79 Adjusted the opcodes for NOOP, BREAK, and LOCK. dgisselq 3051d 23h /zipcpu/trunk/doc
78 Found/corrected annoying bug in floating point documentation of the opcode
table.
dgisselq 3051d 23h /zipcpu/trunk/doc
73 Documentations updates. dgisselq 3052d 22h /zipcpu/trunk/doc

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.