Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [rtl/] - Rev 209


Filtering Options

Clear current filter

Rev Log message Author Age Path
145 This fixes the pipelined memory problem that was introduced a while back to
fix ... pipelined memory conflicts. This appears to maintain the success
of the fix, while recovering the pipeline memory performance that was had
dgisselq 2699d 05h /zipcpu/trunk/rtl/
144 Makes the auto-reload capability a configuration option, and fills out the
reset so that it is properly implemented.
dgisselq 2699d 06h /zipcpu/trunk/rtl/
140 Minor changes, but fixes build of zippy_tb.cpp. dgisselq 2702d 19h /zipcpu/trunk/rtl/
138 This updates the CPU multiply instruction into a set of three instructions.
MPY is a 32x32-bit multiply instruction, returning the low 32-bit result,
MPYUHI returns the upper 32-bits assuming the result was unsigned and MPYSHI
returns the upper 32-bits assuming the result was signed.
dgisselq 2705d 16h /zipcpu/trunk/rtl/
133 Changes preceding an instruction set update, which will change the multiply
operation from a 16x16 bit multiply to three types of 32x32-bit multiplies.
dgisselq 2720d 07h /zipcpu/trunk/rtl/
132 Lots of minor bug fixes. dgisselq 2720d 07h /zipcpu/trunk/rtl/
131 Fixed a variable use before declaration error. dgisselq 2720d 07h /zipcpu/trunk/rtl/
130 Simplified the lock logic, and removed it when pipelining was not defined. This
also means the file is now dependent upon cpudefs.v. In another change, brev
was modified so as not to update the flags. This makes it useable with GCC
as a potential move or load immediate instruction.
dgisselq 2720d 07h /zipcpu/trunk/rtl/
129 Bug fix. Fixes some ugly race conditions that would cause code from the wrong
address to be executed.
dgisselq 2720d 07h /zipcpu/trunk/rtl/
128 Cleaned up some comments. dgisselq 2720d 07h /zipcpu/trunk/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2023, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.