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[/] [zipcpu/] [trunk/] [sw/] - Rev 124

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Rev Log message Author Age Path
99 Added big-endian versus little-endian functionality. You can now specify which
your input file is as a command line parameter, and zdump will properly
disassemble the file.		 dgisselq 2981d 07h /zipcpu/trunk/sw/
98 Added justed longjump instructions from the previous (not used, broken)
functionality to the new LOD (PC),PC functionality.		 dgisselq 2981d 07h /zipcpu/trunk/sw/
97 Added longjump instructions. dgisselq 2981d 07h /zipcpu/trunk/sw/
96 Added the longjump functionality, so that the assembler will properly assemble
instructions to arbitrary 32-bit addresses.		 dgisselq 2981d 07h /zipcpu/trunk/sw/
95 Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large
integer value.		 dgisselq 2983d 13h /zipcpu/trunk/sw/
94 These changes make it possible to build binutils-2.25/ here in this
directory. "make binutils" should be all that is necessary to build the
entire binutils package for the Zip CPU.

The default configure script, run from gas-script.sh below, will build and
install these utilities in an install/ subdirectory made below sw/.		 dgisselq 3008d 10h /zipcpu/trunk/sw/
93 A BINUTILS BACKEND IS NOW AVAILABLE!!!! dgisselq 3016d 08h /zipcpu/trunk/sw/
89 Minor changes, to include making default branching an ADD.[condition] X,PC
instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions.

Further zopcodes.cpp contains several bug fixes.		 dgisselq 3016d 08h /zipcpu/trunk/sw/
70 Updated the assembler support files, zopcodes in particular, to handle
the disassembly of the new very long instruction word codes.		 dgisselq 3047d 10h /zipcpu/trunk/sw/
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.		 dgisselq 3053d 14h /zipcpu/trunk/sw/

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