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[/] [zipcpu/] [trunk/] [sw/] - Rev 126

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Rev Log message Author Age Path
101 Adjusted the "BREAK" instruction so that it will now disassemble properly
with an operand. This was necessary to create a (trap_if ...) instruction
for the GCC compiler.		 dgisselq 3565d 01h /zipcpu/trunk/sw/
100 Some changes to support early branching: branches are now ADD #x,PC instructions
instead of MOV #x(PC),PC--providing greater range to the CPU. When that range
is insufficient, ZPARSER now recognizes long jump instructions coded as
LOD (PC),PC followed by the jump address. (This change was made necessary by
the need to build an assembler/linker that could create instructions that would
jump to any address in the 32-bit address space. In short, a part of the
ongoing GCC upgrade and rework.)		 dgisselq 3565d 01h /zipcpu/trunk/sw/
99 Added big-endian versus little-endian functionality. You can now specify which
your input file is as a command line parameter, and zdump will properly
disassemble the file.		 dgisselq 3565d 01h /zipcpu/trunk/sw/
98 Added justed longjump instructions from the previous (not used, broken)
functionality to the new LOD (PC),PC functionality.		 dgisselq 3565d 01h /zipcpu/trunk/sw/
97 Added longjump instructions. dgisselq 3565d 01h /zipcpu/trunk/sw/
96 Added the longjump functionality, so that the assembler will properly assemble
instructions to arbitrary 32-bit addresses.		 dgisselq 3565d 01h /zipcpu/trunk/sw/
95 Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large
integer value.		 dgisselq 3567d 07h /zipcpu/trunk/sw/
94 These changes make it possible to build binutils-2.25/ here in this
directory. "make binutils" should be all that is necessary to build the
entire binutils package for the Zip CPU.

The default configure script, run from gas-script.sh below, will build and
install these utilities in an install/ subdirectory made below sw/.		 dgisselq 3592d 04h /zipcpu/trunk/sw/
93 A BINUTILS BACKEND IS NOW AVAILABLE!!!! dgisselq 3600d 02h /zipcpu/trunk/sw/
89 Minor changes, to include making default branching an ADD.[condition] X,PC
instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions.

Further zopcodes.cpp contains several bug fixes.		 dgisselq 3600d 02h /zipcpu/trunk/sw/

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