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[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Rev 138


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138 This updates the CPU multiply instruction into a set of three instructions.
MPY is a 32x32-bit multiply instruction, returning the low 32-bit result,
MPYUHI returns the upper 32-bits assuming the result was unsigned and MPYSHI
returns the upper 32-bits assuming the result was signed.
dgisselq 2201d 11h /zipcpu/trunk/sw/gcc-zippatch.patch
136 Oops --- missed a couple HOST_WIDE_INT values in a printf. This casts them
to (long), so that we can work on both PC's and ARMs.
dgisselq 2215d 05h /zipcpu/trunk/sw/gcc-zippatch.patch
135 Replaced all occurrences of INTVAL(...) on printf lines with (long)INTVAL(...).
This should fix the problems zip-gcc was having while running on the ARM.
dgisselq 2215d 05h /zipcpu/trunk/sw/gcc-zippatch.patch
127 Lots of changes and bugfixes. The disassembler produces more readable output.
The assembler and linker will no longer automatically use LDIHI--in preparation
for switching to LONG_MPY. LDIHI/LDILO pairs have been changed to BREV/LDILO
pairs. Within the compiler, conditional moves have been rebuilt. They're not
perfect yet, but they are better. Lots of peephole optimizations, etc.
dgisselq 2216d 01h /zipcpu/trunk/sw/gcc-zippatch.patch
125 This patch contains minor updates. Two are important to mention: 1) It turns
the compare optimizations back on within the file, and 2) it fixes an
internal compiler fault that was causing the compiler to such up all of my
memory in an infinite recursion.
dgisselq 2224d 09h /zipcpu/trunk/sw/gcc-zippatch.patch
124 Lots of changes, lots of bugfixes--both to the compiler as well as to the
assembler. (Ex: the assembler will now properly execute a LDI _sym+5,R0).
Many compiler optimizations have been turned off, however. They will probably
be turned back on in the near future--once I get this version proven without
dgisselq 2225d 23h /zipcpu/trunk/sw/gcc-zippatch.patch
122 This represents a major rewrite of the machine definition file, gcc/config/zip/ In particular, the architecture has been changed from a "cc0"
architecture to one with a specific CC_REG and CCmode. Instructions in the
machine definition file must now explicitly set this register with their
results. The result is better condition code handling, better usage of the
conditional execution modes of certain instructions, and even some decent
dgisselq 2231d 03h /zipcpu/trunk/sw/gcc-zippatch.patch
117 Bug fixes: This adds the zip_ucc() instruction as a builtin, fixes the zip_cc()
builtin (both are now unspec_volatile) together with fixing the *_context(int*)
builtins so that they use five registers, never four. Further, this fixes the
negative stack space offset bug. Many of the GCC files now have Zip debugging
hooks within them as well, to simplify further debugging of the compiler.
dgisselq 2235d 10h /zipcpu/trunk/sw/gcc-zippatch.patch
112 Removed some debugging code from the compiler. dgisselq 2243d 10h /zipcpu/trunk/sw/gcc-zippatch.patch
111 Bug fix compiler update! This fixes a lot of the bugs associated with the
previous compiler release.
dgisselq 2243d 10h /zipcpu/trunk/sw/gcc-zippatch.patch
103 A barely functional, but somewhat working, version of GCC to check in.
If the Lord is willing, it should be accompanied by a newlib port soon.
That port should move the GCC status from barely functional but somewhat
working to functional and working, although not (yet) complete.
dgisselq 2260d 15h /zipcpu/trunk/sw/gcc-zippatch.patch
102 Updated bugfix version of the binutils patch, and a first patch of GCC.
The GCC patch is undergoing ongoing and active development. It is also known to
continue to contain active bugs. (It's not done yet.)
dgisselq 2262d 23h /zipcpu/trunk/sw/gcc-zippatch.patch

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