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[/] [zipcpu/] [trunk/] [sw/] [zasm] - Rev 126

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126 Lots of changes preparing the assembly for an instruction set change. While
implemented, they are still commented out via #ifdef LONG_MPY. By defining
LONG_MPY, this new change set will take place.
dgisselq 2897d 19h /zipcpu/trunk/sw/zasm
123 This test now catches and tests some of the pipeline bugs I've been chasing. dgisselq 2907d 16h /zipcpu/trunk/sw/zasm
110 The makefile no longer requires (or supports) building the obsolete machine
code test file optest.
dgisselq 2925d 03h /zipcpu/trunk/sw/zasm
109 This file is now marked as obsolete. dgisselq 2925d 03h /zipcpu/trunk/sw/zasm
105 Fixed some nasty early branching bugs. Adjusted the Makefile to declare that
cpudefs.h was automatically generated from cpudefs.v, and made sure that
zipbones included the cpudefs.v so it could get the DEBUG_SCOPE define.
In addition, the test.S was updated to test long jumps, the early branching
bug we found, and all three early branching instructions: ADD #x,PC, LOC(PC),PC,
and LDI #x,PC.
dgisselq 2941d 03h /zipcpu/trunk/sw/zasm
103 A barely functional, but somewhat working, version of GCC to check in.
If the Lord is willing, it should be accompanied by a newlib port soon.
That port should move the GCC status from barely functional but somewhat
working to functional and working, although not (yet) complete.
dgisselq 2942d 08h /zipcpu/trunk/sw/zasm
101 Adjusted the "BREAK" instruction so that it will now disassemble properly
with an operand. This was necessary to create a (trap_if ...) instruction
for the GCC compiler.
dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
100 Some changes to support early branching: branches are now ADD #x,PC instructions
instead of MOV #x(PC),PC--providing greater range to the CPU. When that range
is insufficient, ZPARSER now recognizes long jump instructions coded as
LOD (PC),PC followed by the jump address. (This change was made necessary by
the need to build an assembler/linker that could create instructions that would
jump to any address in the 32-bit address space. In short, a part of the
ongoing GCC upgrade and rework.)
dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
99 Added big-endian versus little-endian functionality. You can now specify which
your input file is as a command line parameter, and zdump will properly
disassemble the file.
dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
98 Added justed longjump instructions from the previous (not used, broken)
functionality to the new LOD (PC),PC functionality.
dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
97 Added longjump instructions. dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
96 Added the longjump functionality, so that the assembler will properly assemble
instructions to arbitrary 32-bit addresses.
dgisselq 2946d 19h /zipcpu/trunk/sw/zasm
95 Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large
integer value.
dgisselq 2949d 02h /zipcpu/trunk/sw/zasm
89 Minor changes, to include making default branching an ADD.[condition] X,PC
instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions.

Further zopcodes.cpp contains several bug fixes.
dgisselq 2981d 21h /zipcpu/trunk/sw/zasm
70 Updated the assembler support files, zopcodes in particular, to handle
the disassembly of the new very long instruction word codes.
dgisselq 3012d 22h /zipcpu/trunk/sw/zasm
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.
dgisselq 3019d 03h /zipcpu/trunk/sw/zasm
60 Fixed assembler processing of jump instructions, so that the new fast
return instruction can be used. The test file was modified to test
pipelined value passing within the CPU. That's where the value gets
(re)used before being stored back in the register file. As of this release,
all tests work.
dgisselq 3080d 03h /zipcpu/trunk/sw/zasm
55 A test was added to double check whether carry following right shifts worked.
This was a necessary part of getting two cycle linear feedback shift register
operations working for a memory test on a XuLA2 board. With this, I can now
verify that such feedback registers work for pseudorandom number purposes.
dgisselq 3090d 05h /zipcpu/trunk/sw/zasm
54 This builds on the support for backslash character escapes in both single
and multicharacter expressions. Backslash character escapes are now
possible with quotations and backslashes, and the same code to interpret
the escapes is applied to both single and multicharacter sequences.
dgisselq 3090d 05h /zipcpu/trunk/sw/zasm
53 Updated the #include/#define directives to work properly for nested includes.
(They were supposed to work properly for nested includes before ... and didn't)
This fixes those bugs.
dgisselq 3090d 05h /zipcpu/trunk/sw/zasm

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