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[/] [zipcpu/] [trunk] - Rev 199


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Rev Log message Author Age Path
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.
dgisselq 2808d 12h /zipcpu/trunk
198 Added a copyright notice. dgisselq 2809d 16h /zipcpu/trunk
197 Added a new multiply testbench. Other changes were necessary to follow. dgisselq 2809d 16h /zipcpu/trunk
196 Updated internal documentation. dgisselq 2809d 16h /zipcpu/trunk
195 Adds a new mode that can handle a delayed stall signal. dgisselq 2809d 16h /zipcpu/trunk
194 Cleaned up some parameters, trying to create more consistency. dgisselq 2809d 16h /zipcpu/trunk
193 These changes make it so the ALU multiplies pass a test-bench. dgisselq 2809d 16h /zipcpu/trunk
192 Fixed a bug with constant alignment in the assembler. dgisselq 2809d 17h /zipcpu/trunk
191 Updated toolchain, more information on the example debugger. dgisselq 2824d 20h /zipcpu/trunk
190 Added the copyright statement back in. dgisselq 2826d 11h /zipcpu/trunk
189 Final, as delivered, ORCONF slides. dgisselq 2826d 11h /zipcpu/trunk
188 Adjusted the opcodes to match the binutils port: added RTN instructions, and
allowed BREAK instructions to include an immediate--to be interpreted by the
dgisselq 2858d 14h /zipcpu/trunk
187 Updated to match changed register definitions within the core. dgisselq 2858d 14h /zipcpu/trunk
186 Now allows profile dumping for ELF executables. dgisselq 2858d 14h /zipcpu/trunk
185 Now includes the proper flags for building with ELF executable file support. dgisselq 2858d 14h /zipcpu/trunk
184 Adjusted the illegal instruction option documentation. dgisselq 2858d 14h /zipcpu/trunk
183 Cleaned up the system so that !CYC implies !STB as well. dgisselq 2858d 14h /zipcpu/trunk
182 Bug fix for fast memories. This now works for memories with single cycle
dgisselq 2858d 14h /zipcpu/trunk
181 Adjusted the wishbone logic to include our wishbone simplification that if
CYC is ever low, STB must be low as well.
dgisselq 2858d 14h /zipcpu/trunk
180 Cleaned up the stall logic--made it independent of whether or not we are
designed to be alternating or not.
dgisselq 2858d 14h /zipcpu/trunk

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