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[/] [zipcpu] - Rev 147

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147 Cleans up div_tb a bit, causing it to write SUCCESS out if successful and
abort if not.
dgisselq 2911d 14h /zipcpu
146 Fixes a problem where the assembler complained the compiler was trying to
move .org backwards. This is now fixed.
dgisselq 2911d 14h /zipcpu
145 This fixes the pipelined memory problem that was introduced a while back to
fix ... pipelined memory conflicts. This appears to maintain the success
of the fix, while recovering the pipeline memory performance that was had
before.
dgisselq 2911d 14h /zipcpu
144 Makes the auto-reload capability a configuration option, and fills out the
reset so that it is properly implemented.
dgisselq 2911d 15h /zipcpu
143 This section belatedly adjusts the zasm assembler so that it can handle
the LONG_MPY changes that have taken place. However, the test.S assembler
test script is still not properly testing the multiplies--at least it will
succeed on everything else.
dgisselq 2911d 15h /zipcpu
142 Bug fix--fixes some problems with conditional execution, as well as removing
an unnecessary peephole optimization.
dgisselq 2912d 15h /zipcpu
141 Fixes two bugs: one causing merged strings in the read only string section to
be referenced at the wrong address, and the second which caused the assembler
to fail at SYMBOL-OFFSET references.
dgisselq 2912d 15h /zipcpu
140 Minor changes, but fixes build of zippy_tb.cpp. dgisselq 2915d 04h /zipcpu
139 Changes necessary to document the changed instruction set: LDIHI became MPY,
and MPYU and MPYS became MPYUHI and MPYSHI respectively. See the specification
for more details.
dgisselq 2918d 01h /zipcpu
138 This updates the CPU multiply instruction into a set of three instructions.
MPY is a 32x32-bit multiply instruction, returning the low 32-bit result,
MPYUHI returns the upper 32-bits assuming the result was unsigned and MPYSHI
returns the upper 32-bits assuming the result was signed.
dgisselq 2918d 01h /zipcpu
137 This should (again) fix the bug of trying to build optest.cpp. dgisselq 2931d 19h /zipcpu
136 Oops --- missed a couple HOST_WIDE_INT values in a printf. This casts them
to (long), so that we can work on both PC's and ARMs.
dgisselq 2931d 19h /zipcpu
135 Replaced all occurrences of INTVAL(...) on printf lines with (long)INTVAL(...).
This should fix the problems zip-gcc was having while running on the ARM.
dgisselq 2931d 19h /zipcpu
134 Working updates, to keep this up to date with the RTL code. dgisselq 2932d 16h /zipcpu
133 Changes preceding an instruction set update, which will change the multiply
operation from a 16x16 bit multiply to three types of 32x32-bit multiplies.
dgisselq 2932d 16h /zipcpu
132 Lots of minor bug fixes. dgisselq 2932d 16h /zipcpu
131 Fixed a variable use before declaration error. dgisselq 2932d 16h /zipcpu
130 Simplified the lock logic, and removed it when pipelining was not defined. This
also means the file is now dependent upon cpudefs.v. In another change, brev
was modified so as not to update the flags. This makes it useable with GCC
as a potential move or load immediate instruction.
dgisselq 2932d 16h /zipcpu
129 Bug fix. Fixes some ugly race conditions that would cause code from the wrong
address to be executed.
dgisselq 2932d 16h /zipcpu
128 Cleaned up some comments. dgisselq 2932d 16h /zipcpu

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