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[/] [zipcpu] - Rev 199

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179 Lots of changes, most (all?) of them to the non-pipelined core. The resulting
core is now about 100-120 LUTs smaller when not-pipelined, and yet maintains
the pipelined logic when necessary.		 dgisselq 2787d 06h /zipcpu
178 Rewrote the parameter controlled logic to be just that: perameter controller,
rather than depending upon generics. The result reduces our area by a couple
LUTs.		 dgisselq 2787d 06h /zipcpu
177 Fixed the illegal address logic to be more precise. dgisselq 2787d 06h /zipcpu
176 Switched from distributed to block RAM, and adjusted the logic to help
timing closure. The resulting core will build in designs up to 200MHz in
speed.		 dgisselq 2787d 06h /zipcpu
175 Fixed the carry bit for logical shifts: it is the last bit shifted out of the
register. 0x80000000>>32 yields a 0 with carry set. Anything logically
shifted by a number greater than thirty two clears carry and register.		 dgisselq 2787d 06h /zipcpu
174 Simplified the divide to improve timing performance. dgisselq 2787d 06h /zipcpu
173 Adjusted the pdfinfo field, to accommodate Google's bot. dgisselq 2787d 06h /zipcpu
172 Added a test to see if the compiler properly handles a large number of
arguments. Further, the sibcall enabled compiler now correcly makes a
sibcall from the end of txreg().		 dgisselq 2787d 06h /zipcpu
171 This fixes the problem whereby the ZipCPU didn't properly access more than
5 word-sized function parameters.		 dgisselq 2789d 11h /zipcpu
170 Minor updates to the orconf.pdf pre-conference slide. (Added the 'to be
revealed' line.		 dgisselq 2799d 06h /zipcpu

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