URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] - Rev 66

Rev 66, 2013-03-06 12:05:05 GMT
Author: JonasDC
Log message:
added asymmetric ram structures to support a more performant ramstyle.
defined for xilinx and altera, not tested with other tools.

Path
/mod_sim_exp/trunk/rtl/vhdl/ram/dpramblock_asym.vhd
/mod_sim_exp/trunk/rtl/vhdl/ram/dpram_asym.vhd
/mod_sim_exp/trunk/rtl/vhdl/ram/tdpramblock_asym.vhd
/mod_sim_exp/trunk/rtl/vhdl/ram/tdpram_asym.vhd