URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] - Rev 30

Path
/neorv32/trunk/.ci/hw_check.sh
/neorv32/trunk/.ci/sw_check.sh
/neorv32/trunk/docs/figures/neorv32_processor.png
/neorv32/trunk/docs/NEORV32.pdf
/neorv32/trunk/README.md
/neorv32/trunk/rtl/core/neorv32_cpu.vhd
/neorv32/trunk/rtl/core/neorv32_cpu_bus.vhd
/neorv32/trunk/rtl/core/neorv32_cpu_control.vhd
/neorv32/trunk/rtl/core/neorv32_devnull.vhd
/neorv32/trunk/rtl/core/neorv32_package.vhd
/neorv32/trunk/rtl/core/neorv32_sysinfo.vhd
/neorv32/trunk/rtl/core/neorv32_top.vhd
/neorv32/trunk/rtl/core/neorv32_uart.vhd
/neorv32/trunk/rtl/fpga_specific/lattice_ice40up/neorv32_dmem.ice40up_spram.vhd
/neorv32/trunk/rtl/fpga_specific/lattice_ice40up/neorv32_imem.ice40up_spram.vhd
/neorv32/trunk/rtl/top_templates/neorv32_cpu_stdlogic.vhd
/neorv32/trunk/rtl/top_templates/neorv32_test_setup.vhd
/neorv32/trunk/rtl/top_templates/neorv32_top_stdlogic.vhd
/neorv32/trunk/sim/ghdl/ghdl_sim.sh
/neorv32/trunk/sim/neorv32_tb.vhd
/neorv32/trunk/sw/example/cpu_test/main.c
/neorv32/trunk/sw/lib/include/neorv32.h
/neorv32/trunk/sw/lib/source/neorv32_rte.c
/neorv32/trunk/sw/lib/source/neorv32_uart.c