OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] - Rev 460

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 460, 2011-01-05 10:08:41 GMT
  • Author: jeremybennett
  • Log message:
    Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes.
Path
/openrisc/trunk/or1ksim/aclocal.m4
/openrisc/trunk/or1ksim/argtable2/Makefile.in
/openrisc/trunk/or1ksim/bpb/Makefile.in
/openrisc/trunk/or1ksim/cache/Makefile.in
/openrisc/trunk/or1ksim/ChangeLog
/openrisc/trunk/or1ksim/configure
/openrisc/trunk/or1ksim/configure.ac
/openrisc/trunk/or1ksim/cpu/common/Makefile.in
/openrisc/trunk/or1ksim/cpu/dlx/Makefile.in
/openrisc/trunk/or1ksim/cpu/Makefile.in
/openrisc/trunk/or1ksim/cpu/or1k/Makefile.in
/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
/openrisc/trunk/or1ksim/cpu/or32/insnset.c
/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
/openrisc/trunk/or1ksim/cuc/Makefile.in
/openrisc/trunk/or1ksim/debug/Makefile.in
/openrisc/trunk/or1ksim/doc/Makefile.in
/openrisc/trunk/or1ksim/doc/or1ksim.info
/openrisc/trunk/or1ksim/doc/or1ksim.texi
/openrisc/trunk/or1ksim/doc/version.texi
/openrisc/trunk/or1ksim/Makefile.in
/openrisc/trunk/or1ksim/mmu/Makefile.in
/openrisc/trunk/or1ksim/peripheral/channels/Makefile.in
/openrisc/trunk/or1ksim/peripheral/eth.c
/openrisc/trunk/or1ksim/peripheral/Makefile.in
/openrisc/trunk/or1ksim/pic/Makefile.in
/openrisc/trunk/or1ksim/pm/Makefile.in
/openrisc/trunk/or1ksim/port/Makefile.in
/openrisc/trunk/or1ksim/softfloat/Makefile.in
/openrisc/trunk/or1ksim/support/Makefile.in
/openrisc/trunk/or1ksim/testsuite/ChangeLog
/openrisc/trunk/or1ksim/testsuite/config/Makefile.in
/openrisc/trunk/or1ksim/testsuite/lib/Makefile.in
/openrisc/trunk/or1ksim/testsuite/libsim.tests/Makefile.in
/openrisc/trunk/or1ksim/testsuite/Makefile.in
/openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in
/openrisc/trunk/or1ksim/testsuite/README
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/aclocal.m4
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-gpio/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-uart/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/basic/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cbasic/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cfg/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/dhry/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/dmatest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/exit/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/ext/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/fbtest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/flag/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/functest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-logger/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/kbdtest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/local-global/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/loop/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mem-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mycompress/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/spr-defs.h
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/testfloat/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/tick/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/upcalls/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-iftest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-inttest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-upcalls/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/Makefile.in
/openrisc/trunk/or1ksim/tick/Makefile.in
/openrisc/trunk/or1ksim/vapi/Makefile.in

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.