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Last modification

  • Rev 15, 2010-04-14 20:06:57 GMT
  • Author: jt_eaton
  • Log message:
    added io_module with ps2 and uart
    added soc_mouse with uart and mouse interface
    fixed latch in mrisc
Path
/socgen/trunk/bench/verilog/models/clock_gen.v
/socgen/trunk/bench/verilog/models/iobuftri.v
/socgen/trunk/bench/verilog/models/micro_bus_model.v
/socgen/trunk/bench/verilog/models/ps2_model.v
/socgen/trunk/bench/verilog/models/UART_Mon.v
/socgen/trunk/lib/cde_sync
/socgen/trunk/lib/cde_sync/cde_sync.v
/socgen/trunk/lib/cde_sync/cde_sync_with_hysteresis.v
/socgen/trunk/lib/cde_sync/cde_sync_with_reset.v
/socgen/trunk/projects/logic/ip/disp_io/rtl/verilog/disp_io.v
/socgen/trunk/projects/logic/ip/io_module
/socgen/trunk/projects/logic/ip/io_module/bin
/socgen/trunk/projects/logic/ip/io_module/bin/Makefile
/socgen/trunk/projects/logic/ip/io_module/doc
/socgen/trunk/projects/logic/ip/io_module/doc/copyright.v
/socgen/trunk/projects/logic/ip/io_module/rtl
/socgen/trunk/projects/logic/ip/io_module/rtl/variants
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_gpio.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_pic.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_ps2.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_timer.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_uart.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_utimer.v
/socgen/trunk/projects/logic/ip/io_module/sim
/socgen/trunk/projects/logic/ip/io_module/sim/bin
/socgen/trunk/projects/logic/ip/io_module/sim/bin/Makefile
/socgen/trunk/projects/logic/ip/io_module/sim/log
/socgen/trunk/projects/logic/ip/io_module/sim/out
/socgen/trunk/projects/logic/ip/io_module/sim/run
/socgen/trunk/projects/logic/ip/io_module/sim/run/default
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/dmp_define
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/dut
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/io_module/syn
/socgen/trunk/projects/logic/ip/ps2_interface
/socgen/trunk/projects/logic/ip/ps2_interface/bin
/socgen/trunk/projects/logic/ip/ps2_interface/bin/Makefile
/socgen/trunk/projects/logic/ip/ps2_interface/doc
/socgen/trunk/projects/logic/ip/ps2_interface/doc/copyright.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/variants
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/variants/ps2_interface
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/variants/ps2_interface/ps2_interface_defines.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface_fsm.v
/socgen/trunk/projects/logic/ip/ps2_interface/sim
/socgen/trunk/projects/logic/ip/ps2_interface/sim/bin
/socgen/trunk/projects/logic/ip/ps2_interface/sim/bin/Makefile
/socgen/trunk/projects/logic/ip/ps2_interface/sim/log
/socgen/trunk/projects/logic/ip/ps2_interface/sim/out
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/dmp_define
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/dut
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/sav.sav
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/ps2_interface/syn
/socgen/trunk/projects/logic/ip/uart
/socgen/trunk/projects/logic/ip/uart/bin
/socgen/trunk/projects/logic/ip/uart/bin/Makefile
/socgen/trunk/projects/logic/ip/uart/doc
/socgen/trunk/projects/logic/ip/uart/doc/copyright.v
/socgen/trunk/projects/logic/ip/uart/rtl
/socgen/trunk/projects/logic/ip/uart/rtl/variants
/socgen/trunk/projects/logic/ip/uart/rtl/variants/uart
/socgen/trunk/projects/logic/ip/uart/rtl/variants/uart/uart_defines.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_baudgen.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_rcvr.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_xmit.v
/socgen/trunk/projects/logic/ip/uart/sim
/socgen/trunk/projects/logic/ip/uart/sim/bin
/socgen/trunk/projects/logic/ip/uart/sim/bin/Makefile
/socgen/trunk/projects/logic/ip/uart/sim/log
/socgen/trunk/projects/logic/ip/uart/sim/out
/socgen/trunk/projects/logic/ip/uart/sim/run
/socgen/trunk/projects/logic/ip/uart/sim/run/default
/socgen/trunk/projects/logic/ip/uart/sim/run/default/dmp_define
/socgen/trunk/projects/logic/ip/uart/sim/run/default/dut
/socgen/trunk/projects/logic/ip/uart/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/uart/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/uart/syn
/socgen/trunk/projects/pic_micro/children/logic/ip/io_module
/socgen/trunk/projects/pic_micro/children/logic/ip/ps2_interface
/socgen/trunk/projects/pic_micro/children/logic/ip/uart
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc.v
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/test_define
/socgen/trunk/projects/pic_micro/ip/soc_mouse
/socgen/trunk/projects/pic_micro/ip/soc_mouse/bin
/socgen/trunk/projects/pic_micro/ip/soc_mouse/bin/Makefile
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/copyright.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants/soc_mouse_mrisc
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants/soc_mouse_mrisc/soc_mouse_defines.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog/soc_mouse.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/bin
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/bin/Makefile
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/log
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/out
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/copyright
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/dmp_define
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/dut
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/liblist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/modellist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/TB.defs
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/test_define
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/Basys
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/bsdl
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/bsdl/xc3s100e_vq100_1532.bsd
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/core.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/debug
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/debug/fpga_load
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/debug/impact_bat
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/def_file
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/Makefile
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/target
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/target/Basys
/socgen/trunk/projects/pic_micro/sw/mouse
/socgen/trunk/projects/pic_micro/sw/mouse/Makefile
/socgen/trunk/projects/pic_micro/sw/mouse/mouse.asm

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