URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] - Rev 71

Rev 71, 2009-03-17 17:04:28 GMT
Author: creep
Log message:
Four addressing modes are simulated: immediate, accumulator, implied and absolute.
The simulation was done using a testbench that contains a small memory inside.

Path
/t6507lp/trunk/rtl/verilog/t6507lp_fsm.v
/t6507lp/trunk/rtl/verilog/t6507lp_fsm_tb.v