URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] - Rev 79

Rev 79, 2010-05-01 21:33:42 GMT
Author: julius
Log message:
Added defines that fix bugs with slow wishbone clocks doing burst writes

Path
/versatile_mem_ctrl/trunk/rtl/verilog/fsm_sdr_16.v
/versatile_mem_ctrl/trunk/rtl/verilog/sdr_16.v
/versatile_mem_ctrl/trunk/rtl/verilog/sdr_16_defines.v
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_mem_ctrl_wb.v