URL
https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk
Subversion Repositories RISCMCU
[/] [RISCMCU/] [trunk/] [simulation/] - Rev 23
Directory listing | View Log | RSS feed
Last modification
- Rev 23, 2002-07-07 10:35:55 GMT
- Author: yapzihe
- Log message:
- A demo of MAX+plus II .scf simulation file
The waveform shows how the MCU output 3, 2 and 1 to port B, port C and port D using different instructions.