Subversion Repositories amber

Last modification

• Rev 71, 2013-04-28 16:56:57 GMT
• Author: csantifort

• Log message:

  Original Amber 23 core uses asyncronous implementation of register bank.
  It leads to some problems with ram-based implementation of the register bank,
  because at least Altera FPGAs uses syncronous ram blocks, so the whole address
  needs to be latched.
  
  The patch exposes non-registered versions of register select signals to the
  register bank, so the bank can build address and latch it in the syncronous
  ram input register.
  
  The patch is a pre-requisite for ram-based register bank implementation on Altera FPGA.
  
  Contributed by Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>