OpenCores
URL https://opencores.org/ocsvn/dblclockfft/dblclockfft/trunk

Subversion Repositories dblclockfft

[/] [dblclockfft/] [trunk/] [sw/] - Rev 3

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 3, 2015-02-27 14:33:58 GMT
  • Author: dgisselq
  • Log message:
    The first upload of the s/w didn't take. Had it taken, the comment would've
    been: This is the first upload of the double clocked FFT software. While it
    should (roughly) be complete, a lot of work remains to be done--primarily
    in building test benches, modifying the interface of fftgen to make it
    more friendly, etc. In fact, the c++ code not only compiles, but the
    Verilog code it produces actually builds as well!

    Now, however, I have several test benches written, and have verified the
    unit functionality of the multiply, bit reversal stage, the dblstage (FFT
    len 2), and the qtrstage (FFT len 4). I then took a closer look at the
    multiply, discovered it failed at signed integers and rebuilt it. The
    new test bench tests the full 16-bit signed integer support properly. This
    leaves butterflies and generic FFT stages that still need test benches, as
    does the main (I)FFT program.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.