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[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 82
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Last modification
- Rev 82, 2002-03-02 19:12:40 GMT
- Author: mohor
- Log message:
- Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
