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https://opencores.org/ocsvn/ethmac/ethmac/trunk
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[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 47
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Last modification
- Rev 47, 2002-02-12 17:03:03 GMT
- Author: mohor
- Log message:
- HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.