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URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [positVerilog/] - Rev 48

Rev

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Last modification

  • Rev 48, 2020-11-02 21:07:28 GMT
  • Author: robfinch
  • Log message:
    - refactoring to use packages
Path
/ft816float/trunk/rtl/positVerilog/div_lut.sv
/ft816float/trunk/rtl/positVerilog/fpToPosit.sv
/ft816float/trunk/rtl/positVerilog/intToPosit.sv
/ft816float/trunk/rtl/positVerilog/posit.sv
/ft816float/trunk/rtl/positVerilog/positAddsub.sv
/ft816float/trunk/rtl/positVerilog/positCntlo.sv
/ft816float/trunk/rtl/positVerilog/positCntlz.sv
/ft816float/trunk/rtl/positVerilog/positDecompose.sv
/ft816float/trunk/rtl/positVerilog/positDivide.sv
/ft816float/trunk/rtl/positVerilog/positFDP.sv
/ft816float/trunk/rtl/positVerilog/positFDPAddsub.sv
/ft816float/trunk/rtl/positVerilog/positFDPMul.sv
/ft816float/trunk/rtl/positVerilog/positMul.sv
/ft816float/trunk/rtl/positVerilog/positMultiply.sv
/ft816float/trunk/rtl/positVerilog/positSqrt.sv
/ft816float/trunk/rtl/positVerilog/positToFp.sv
/ft816float/trunk/rtl/positVerilog/positToInt.sv
/ft816float/trunk/rtl/verilog2/f2i.sv
/ft816float/trunk/rtl/verilog2/fp.sv
/ft816float/trunk/rtl/verilog2/fpAddsub.sv
/ft816float/trunk/rtl/verilog2/fpCompare.sv
/ft816float/trunk/rtl/verilog2/fpDecompReg.sv
/ft816float/trunk/rtl/verilog2/fpDivide.sv
/ft816float/trunk/rtl/verilog2/fpFMA.sv
/ft816float/trunk/rtl/verilog2/fpMultiply.sv
/ft816float/trunk/rtl/verilog2/fpNormalize.sv
/ft816float/trunk/rtl/verilog2/fpRound.sv
/ft816float/trunk/rtl/verilog2/fpSqrt.sv
/ft816float/trunk/rtl/verilog2/fpToPosit.sv
/ft816float/trunk/rtl/verilog2/i2f.sv
/ft816float/trunk/rtl/verilog2/positCntlo.sv
/ft816float/trunk/rtl/verilog2/positCntlz.sv
/ft816float/trunk/rtl/verilog2/positConfig.sv
/ft816float/trunk/rtl/verilog2/positDecompose.sv
/ft816float/trunk/rtl/verilog2/positSize.sv
/ft816float/trunk/rtl/verilog2/positToFp.sv
/ft816float/trunk/rtl/verilog2/README.md

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