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https://opencores.org/ocsvn/light52/light52/trunk
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[/] [light52/] - Rev 26
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Last modification
- Rev 26, 2013-12-06 21:44:30 GMT
- Author: ja_rd
- Log message:
- Changed the VHDL simulation logging code to match the SW simulator.
The JBC ACC.x instruction is a special case that needs a tiny hack...
Note this affects only the simulation test bench, not the RTL!