OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [verilog/] [sim/] [icarus/] - Rev 66

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 66, 2012-03-03 17:58:06 GMT
  • Author: motilito
  • Log message:
    Adding interrupt example code to the Verilog implementation. An interrupt controller was added to the sample SOC module and a sample code was added to the "hello.c" example code.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.