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[/] [mcs-4/] [trunk/] [rtl/] [verilog/] [i4003/] - Rev 7

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Last modification

  • Rev 6, 2021-12-02 21:58:25 GMT
  • Author: rrpollack
  • Log message:
    Massive update of all MCS-4 components

    This commit updates all the previous i4004 CPU modules to address
    various bugs that were found during testing. At this point, all
    CPU functions appear to operate correctly. No FPGA-specific
    features are required by the i4004 CPU implementation.

    This commit also provides implementations of the 4001 ROM, 4002 RAM,
    and 4003 Shift Register chips, thus allowing a functional MCS-4
    system to be implemented. Some of these modules are dependent on
    features found in the Xilinx Spartan FPGA, such as Block RAM and
    dual-port Distributed RAM, though alternate implementations are
    possible for other FPGAs.

    These modules have been used (along with keyboard and printer emulation
    modules not provided here) to implement a complete Busicom 141-PF calculator
    clone using a Xilinx Spartan 6 FPGA and a custom PCB. All functions
    of the Busicom 141-PF calculator appear to function normally.

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