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[/] [minsoc/] [trunk/] [backend/] [altera_3c25_board/] - Rev 97
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Last modification
- Rev 97, 2011-09-12 08:54:47 GMT
- Author: rfajardo
- Log message:
- As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board.
