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https://opencores.org/ocsvn/minsoc/minsoc/trunk
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[/] [minsoc/] [trunk/] [bench/] [verilog/] - Rev 9
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Last modification
- Rev 9, 2009-10-07 16:32:49 GMT
- Author: rfajardo
- Log message:
- Tiny change to testbench gain:
-uart_srx is now reg for future testbench serial input to SoC.
