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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

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[/] [minsoc/] [trunk/] [sw/] - Rev 2

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Last modification

  • Rev 2, 2009-09-18 11:46:11 GMT
  • Author: rfajardo
  • Log message:
    First commit of project. Beta status:
    -testbench: working
    -firmware: working
    -RTL: Working for: Xilinx Spartan-3A DSP Development Kit
Path
/minsoc/trunk/backend
/minsoc/trunk/backend/spartan3a_dsp_kit.ucf
/minsoc/trunk/backend/spartan3e_starter_kit.ucf
/minsoc/trunk/bench
/minsoc/trunk/bench/verilog
/minsoc/trunk/bench/verilog/eth_phy.v
/minsoc/trunk/bench/verilog/eth_phy_defines.v
/minsoc/trunk/bench/verilog/minsoc_bench.v
/minsoc/trunk/bench/verilog/minsoc_bench_defines.v
/minsoc/trunk/bench/verilog/minsoc_memory_model.v
/minsoc/trunk/bench/verilog/tb_eth_defines.v
/minsoc/trunk/bench/verilog/vpi
/minsoc/trunk/bench/verilog/vpi/dbg_comm_vpi.v
/minsoc/trunk/bench/verilog/vpi/jp-io-vpi.vpi
/minsoc/trunk/doc
/minsoc/trunk/doc/lgpl-3.0.txt
/minsoc/trunk/doc/minsoc.odt
/minsoc/trunk/doc/minsoc.pdf
/minsoc/trunk/rtl
/minsoc/trunk/rtl/verilog
/minsoc/trunk/rtl/verilog/minsoc_clock_manager.v
/minsoc/trunk/rtl/verilog/minsoc_defines.v
/minsoc/trunk/rtl/verilog/minsoc_onchip_ram.v
/minsoc/trunk/rtl/verilog/minsoc_onchip_ram_top.v
/minsoc/trunk/rtl/verilog/minsoc_startup
/minsoc/trunk/rtl/verilog/minsoc_startup/OR1K_startup_generic.v
/minsoc/trunk/rtl/verilog/minsoc_startup/spi_clgen.v
/minsoc/trunk/rtl/verilog/minsoc_startup/spi_defines.v
/minsoc/trunk/rtl/verilog/minsoc_startup/spi_shift.v
/minsoc/trunk/rtl/verilog/minsoc_startup/spi_top.v
/minsoc/trunk/rtl/verilog/minsoc_tc_top.v
/minsoc/trunk/rtl/verilog/minsoc_top.v
/minsoc/trunk/rtl/verilog/minsoc_xilinx_internal_jtag.v
/minsoc/trunk/sim
/minsoc/trunk/sim/bin
/minsoc/trunk/sim/bin/minsoc_memory_complete.txt
/minsoc/trunk/sim/bin/minsoc_memory_fast.txt
/minsoc/trunk/sim/bin/minsoc_model_complete.txt
/minsoc/trunk/sim/bin/minsoc_model_fast.txt
/minsoc/trunk/sim/results
/minsoc/trunk/sim/results/wave.do.sav
/minsoc/trunk/sim/run
/minsoc/trunk/sim/run/generate_bench
/minsoc/trunk/sim/run/run_bench
/minsoc/trunk/sim/run/start_server
/minsoc/trunk/sw
/minsoc/trunk/sw/eth
/minsoc/trunk/sw/eth/eth.c
/minsoc/trunk/sw/eth/eth.h
/minsoc/trunk/sw/eth/Makefile
/minsoc/trunk/sw/support
/minsoc/trunk/sw/support/board.h
/minsoc/trunk/sw/support/except.S
/minsoc/trunk/sw/support/int.c
/minsoc/trunk/sw/support/int.h
/minsoc/trunk/sw/support/Makefile
/minsoc/trunk/sw/support/Makefile.inc
/minsoc/trunk/sw/support/mc.h
/minsoc/trunk/sw/support/orp.cfg
/minsoc/trunk/sw/support/orp.ld
/minsoc/trunk/sw/support/reset.S
/minsoc/trunk/sw/support/spr_defs.h
/minsoc/trunk/sw/support/support.c
/minsoc/trunk/sw/support/support.h
/minsoc/trunk/sw/support/uart.c
/minsoc/trunk/sw/support/uart.h
/minsoc/trunk/sw/support/vfnprintf.c
/minsoc/trunk/sw/support/vfnprintf.h
/minsoc/trunk/sw/uart
/minsoc/trunk/sw/uart/Makefile
/minsoc/trunk/sw/uart/uart.c
/minsoc/trunk/sw/uart/uart.h
/minsoc/trunk/sw/utils
/minsoc/trunk/sw/utils/bin2c.c
/minsoc/trunk/sw/utils/bin2flimg.c
/minsoc/trunk/sw/utils/bin2hex.c
/minsoc/trunk/sw/utils/bin2srec.c
/minsoc/trunk/sw/utils/bin2vmem.c
/minsoc/trunk/sw/utils/loader.c
/minsoc/trunk/sw/utils/Makefile
/minsoc/trunk/sw/utils/marksec
/minsoc/trunk/sw/utils/merge2srec
/minsoc/trunk/sw/utils/or32-idecode
/minsoc/trunk/sw/utils/or32-idecode/ansidecl.h
/minsoc/trunk/sw/utils/or32-idecode/bfd.h
/minsoc/trunk/sw/utils/or32-idecode/dis-asm.h
/minsoc/trunk/sw/utils/or32-idecode/example_input
/minsoc/trunk/sw/utils/or32-idecode/Makefile
/minsoc/trunk/sw/utils/or32-idecode/or32-dis.c
/minsoc/trunk/sw/utils/or32-idecode/or32-opc.c
/minsoc/trunk/sw/utils/or32-idecode/or32.h
/minsoc/trunk/sw/utils/or32-idecode/symcat.h

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