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[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [I2C/] - Rev 13

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Last modification

  • Rev 12, 2012-11-18 23:46:56 GMT
  • Author: ayersg
  • Log message:
    Updated SoC bit file with hardware divider. Changed SoC frequency to a more conservative 33/66MHz clock. SoC BRAM cores must now be generated by the user. Added a README to the standalone processor directory.

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