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[/] [mips32r1/] [trunk/] [Software/] [xum_bootloader/] [programmer/] [win32_source/] - Rev 2

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Last modification

  • Rev 2, 2012-10-15 06:35:24 GMT
  • Author: ayersg
  • Log message:
    Initial release
Path
/mips32r1/trunk/Documentation
/mips32r1/trunk/Documentation/MIPS
/mips32r1/trunk/Documentation/MIPS/MIPS32_1_Introduction.pdf
/mips32r1/trunk/Documentation/MIPS/MIPS32_2_Instruction_Set.pdf
/mips32r1/trunk/Documentation/MIPS/MIPS32_3_Privileged_Resource.pdf
/mips32r1/trunk/Documentation/MIPS/MIPS32_Quick_Reference.pdf
/mips32r1/trunk/Documentation/XUM
/mips32r1/trunk/Documentation/XUM/MIPS32.pdf
/mips32r1/trunk/Documentation/XUM/MIPS32.vsd
/mips32r1/trunk/Documentation/XUPV5_FPGA
/mips32r1/trunk/Documentation/XUPV5_FPGA/I2C Fan Voltage ADT7476A-D.pdf
/mips32r1/trunk/Documentation/XUPV5_FPGA/master_xupv5-lx110t.ucf
/mips32r1/trunk/Documentation/XUPV5_FPGA/ml50x_schematics.pdf
/mips32r1/trunk/Documentation/XUPV5_FPGA/ML505_Reference_Design_User_Guide.pdf
/mips32r1/trunk/Documentation/XUPV5_FPGA/ML505_User_Guide.pdf
/mips32r1/trunk/Documentation/XUPV5_FPGA/ug195_v5_Pinouts.pdf
/mips32r1/trunk/Hardware
/mips32r1/trunk/Hardware/MIPS32_Standalone
/mips32r1/trunk/Hardware/MIPS32_Standalone/Add.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/ALU.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Compare.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Control.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/CPZero.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/EXMEM_Stage.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Hazard_Detection.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/IDEX_Stage.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/IFID_Stage.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/MemControl.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/MEMWB_Stage.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/MIPS_Parameters.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Mux2.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Mux4.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Processor.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/Register.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/RegisterFile.v
/mips32r1/trunk/Hardware/MIPS32_Standalone/TrapDetect.v
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/BRAM_592KB_2R.mif
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/impact.ipf
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/iseconfig
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/iseconfig/MIPS32-Pipelined-Hw.projectmgr
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/iseconfig/Top.xreport
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/MIPS32-Pipelined-Hw.gise
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/MIPS32-Pipelined-Hw.xise
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Boot.coe
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/BRAM_592KB_Wrapper.v
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.asy
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.gise
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.mif
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.ncf
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.ngc
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.sym
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.v
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.veo
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.xco
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB.xise
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/blk_mem_gen_v7_1_readme.txt
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/doc
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/doc/blk_mem_gen_ds512.pdf
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/doc/blk_mem_gen_v7_1_vinfo.html
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/example_design
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/example_design/BRAM_592KB_exdes.ucf
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/example_design/BRAM_592KB_exdes.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/example_design/BRAM_592KB_exdes.xdc
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/example_design/BRAM_592KB_prod.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/implement.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/implement.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_ise.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_ise.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_ise.tcl
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_rdn.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_rdn.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/planAhead_rdn.tcl
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/xst.prj
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/implement/xst.scr
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/addr_gen.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/bmg_stim_gen.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/bmg_tb_pkg.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/BRAM_592KB_synth.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/BRAM_592KB_tb.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/checker.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/data_gen.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simcmds.tcl
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_isim.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_mti.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_mti.do
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_mti.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_ncsim.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/simulate_vcs.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/ucli_commands.key
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/vcs_session.tcl
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/wave_mti.do
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/functional/wave_ncsim.sv
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/random.vhd
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simcmds.tcl
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_isim.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_mti.bat
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_mti.do
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_mti.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_ncsim.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/simulate_vcs.sh
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/ucli_commands.key
/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB/BRAM_592KB/simulation/timing/vcs_session.tcl
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/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB_2R/BRAM_592KB_2R.xise
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/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/BRAM/Coregen_BRAM_592KB_2R/BRAM_592KB_2R/doc
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