OpenCores
URL https://opencores.org/ocsvn/mod_mult_exp/mod_mult_exp/trunk

Subversion Repositories mod_mult_exp

[/] [mod_mult_exp/] [trunk/] [rtl/] - Rev 6

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 6, 2019-08-16 11:33:59 GMT
  • Author: gajos
  • Log message:
    - Small code refactoring - move txt_util.vhd
    - vhdl/commons/properties.vhd - preparation for ModExpComm512bit sub-core
    - added ModExpComm512bit subcore working with RS232 communication presenting
    core work (and related files).
    - Slight modifications of some comments
    - added appropriate benches and test files
    - added / modified appropriate makefiles
Path
/mod_mult_exp/trunk/bench/vhdl/commons
/mod_mult_exp/trunk/bench/vhdl/commons/ShiftRegTB.vhd
/mod_mult_exp/trunk/bench/vhdl/commons/txt_util.vhd
/mod_mult_exp/trunk/bench/vhdl/communication
/mod_mult_exp/trunk/bench/vhdl/communication/ModExpComm512bitTB.vhd
/mod_mult_exp/trunk/bench/vhdl/txt_util.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/AsyncMux.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/counter.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/dcms
/mod_mult_exp/trunk/rtl/vhdl/commons/dcms.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/dcms/dcms.v
/mod_mult_exp/trunk/rtl/vhdl/commons/dcms/dcms.xaw
/mod_mult_exp/trunk/rtl/vhdl/commons/dcms/dcms_arwz.ucf
/mod_mult_exp/trunk/rtl/vhdl/commons/properties.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/RS232RefComp.vhd
/mod_mult_exp/trunk/rtl/vhdl/commons/ShiftReg.vhd
/mod_mult_exp/trunk/rtl/vhdl/communication
/mod_mult_exp/trunk/rtl/vhdl/communication/ModExpComm.vhd
/mod_mult_exp/trunk/rtl/vhdl/communication/ModExpDataCtrlSM.vhd
/mod_mult_exp/trunk/rtl/vhdl/communication/ModExpDataCtrlUCF.ucf
/mod_mult_exp/trunk/rtl/vhdl/mod_exp/ModExp.vhd
/mod_mult_exp/trunk/rtl/vhdl/mod_mult/ModularMultiplierIterative.vhd
/mod_mult_exp/trunk/sim/rtl_sim/bin/Makefile
/mod_mult_exp/trunk/sim/rtl_sim/bin/ModExpComm512bitTB_beh.prj
/mod_mult_exp/trunk/sim/rtl_sim/bin/ModExpComm512bitTB_stx_beh.prj
/mod_mult_exp/trunk/sim/rtl_sim/bin/ShiftRegTB_beh.prj
/mod_mult_exp/trunk/sim/rtl_sim/bin/ShiftRegTB_stx_beh.prj
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit/Base.txt
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit/Exponent.txt
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit/Modulus.txt
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit/Residuum.txt
/mod_mult_exp/trunk/sim/rtl_sim/bin/testData512bit/Result.txt
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp/Makefile
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp_comm
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp_comm/Makefile
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp_comm/ModExpComm.prj
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp_comm/ModExpComm.ut
/mod_mult_exp/trunk/syn/XC3ES500/mod_exp_comm/ModExpComm.xst
/mod_mult_exp/trunk/syn/XC3ES500/mod_mult/Makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.