URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 15

Rev 15, 2012-10-23 19:15:55 GMT
Author: JonasDC
Log message:
changed generic for register width from n to width for consistency

Path
/mod_sim_exp/trunk/rtl/vhdl/core/first_stage.vhd
/mod_sim_exp/trunk/rtl/vhdl/core/last_stage.vhd
/mod_sim_exp/trunk/rtl/vhdl/core/register_n.vhd
/mod_sim_exp/trunk/rtl/vhdl/core/standard_stage.vhd