URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] - Rev 242

Rev 242, 2020-05-13 18:15:29 GMT
Author: jshamlet
Log message:
Added write protect logic to the RAM cores and system timer as part of scheme to keep tasks from messing up the scheduler or other task's memory. The RAM is now divided into regions with a separate write mask register. The write mask register itself is only writeable with the I bit is set (during an interrupt or by setting it using STP PSR_I). The 1K memory is divided into 16, 64 byte regions while the 4K memory is divided into 32, 128 byte regions. The system timer simply checks for the I bit being set when the write protect generic is set.

Note that setting the write_protect generic false, or leaving it unset, will keep the previous behavior.

Path
/open8_urisc/trunk/VHDL/o8_ram_1k.vhd
/open8_urisc/trunk/VHDL/o8_ram_4k.vhd
/open8_urisc/trunk/VHDL/o8_sys_timer.vhd