OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] - Rev 263

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 263, 2020-07-10 23:00:32 GMT
  • Author: jshamlet
  • Log message:
    Fixed a very old bug in the CPU core where autoincrements weren't affecting the upper register in the pair, causing it to loop around the lower 256 bytes. This only affected LDX/LDO, as the proper ALU signals were being generated in STO/STX and UPP. Wow, that bug has been in there for AGES.

    Also separated the SDLC TX and RX interrupts so that they could be handled separately.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.