URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [bench/] [verilog/] - Rev 192

Rev 192, 2013-12-17 20:15:28 GMT
Author: olivier.girard
Log message:
Number of supported IRQs is now configurable to 14 (default), 30 or 62.

Path
/openmsp430/trunk/core/bench/verilog/tb_openMSP430.v
/openmsp430/trunk/core/rtl/verilog/omsp_alu.v
/openmsp430/trunk/core/rtl/verilog/omsp_frontend.v
/openmsp430/trunk/core/rtl/verilog/openMSP430.v
/openmsp430/trunk/core/rtl/verilog/openMSP430_defines.v
/openmsp430/trunk/core/rtl/verilog/openMSP430_undefines.v
/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim
/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim_c
/openmsp430/trunk/core/sim/rtl_sim/bin/template.x
/openmsp430/trunk/core/sim/rtl_sim/run/run_all
/openmsp430/trunk/core/sim/rtl_sim/src/dbg_uart_onoff.v
/openmsp430/trunk/core/sim/rtl_sim/src/dbg_uart_sync.v
/openmsp430/trunk/core/sim/rtl_sim/src/irq32.s43
/openmsp430/trunk/core/sim/rtl_sim/src/irq32.v
/openmsp430/trunk/core/sim/rtl_sim/src/irq64.s43
/openmsp430/trunk/core/sim/rtl_sim/src/irq64.v
/openmsp430/trunk/core/sim/rtl_sim/src/nmi.v
/openmsp430/trunk/core/sim/rtl_sim/src/sing-op_reti.v