URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [OBSOLETE/] [altera_de1_board/] [bench/] [verilog/] - Rev 29

Last modification

Rev 29, 2009-12-27 20:08:53 GMT
Author: olivier.girard
Log message:
Add Altera Cyclone II FPGA project example.

Path
/openmsp430/trunk/fpga/altera_de1_board
/openmsp430/trunk/fpga/altera_de1_board/bench
/openmsp430/trunk/fpga/altera_de1_board/bench/verilog
/openmsp430/trunk/fpga/altera_de1_board/bench/verilog/altsyncram.v
/openmsp430/trunk/fpga/altera_de1_board/bench/verilog/msp_debug.v
/openmsp430/trunk/fpga/altera_de1_board/bench/verilog/registers.v
/openmsp430/trunk/fpga/altera_de1_board/bench/verilog/tb_openMSP430_fpga.v
/openmsp430/trunk/fpga/altera_de1_board/doc
/openmsp430/trunk/fpga/altera_de1_board/doc/DE1_Board_Schematic.pdf
/openmsp430/trunk/fpga/altera_de1_board/doc/DE1_Reference_Manual.pdf
/openmsp430/trunk/fpga/altera_de1_board/doc/DE1_User Guide.pdf
/openmsp430/trunk/fpga/altera_de1_board/README
/openmsp430/trunk/fpga/altera_de1_board/rtl
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/driver_7segment.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/ext_de1_sram.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/io_mux.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430/openMSP430_defines.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/OpenMSP430_fpga.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/ram16x512.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/rom16x2048.v
/openmsp430/trunk/fpga/altera_de1_board/sim
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin/ihex2mem.tcl
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin/msp430sim
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin/rtlsim.sh
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/run
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/run/run
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/run/run_disassemble
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/src
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/src/memledtest.v
/openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/src/submit.f
/openmsp430/trunk/fpga/altera_de1_board/software
/openmsp430/trunk/fpga/altera_de1_board/software/bin
/openmsp430/trunk/fpga/altera_de1_board/software/bin/mifwrite
/openmsp430/trunk/fpga/altera_de1_board/software/bin/mifwrite.cpp
/openmsp430/trunk/fpga/altera_de1_board/software/bin/mifwrite.exe
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/7seg.c
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/7seg.h
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/gray.c
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/gray.h
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/hardware.h
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/link.ld
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/main.c
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/makefile
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memledtest.a43
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memledtest.bin
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memledtest.elf
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memledtest.lst
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memledtest.mif
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memtest.c
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/memtest.h
/openmsp430/trunk/fpga/altera_de1_board/software/memledtest/README
/openmsp430/trunk/fpga/altera_de1_board/synthesis
/openmsp430/trunk/fpga/altera_de1_board/synthesis/altera
/openmsp430/trunk/fpga/altera_de1_board/synthesis/altera/main.qsf
/openmsp430/trunk/fpga/altera_de1_board/synthesis/altera/main.sof
/openmsp430/trunk/fpga/altera_de1_board/synthesis/altera/OpenMSP430_fpga.qpf
/openmsp430/trunk/fpga/altera_de1_board/synthesis/altera/openMSP430_fpga_top.v

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [OBSOLETE/] [altera_de1_board/] [bench/] [verilog/] - Rev 29

Last modification