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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [synthesis/] [xilinx/] - Rev 176

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Last modification

  • Rev 176, 2013-01-30 21:22:50 GMT
  • Author: olivier.girard
  • Log message:
    Update FPGA projects with latest openMSP430 core RTL
Path
/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/omsp_dbg.v
/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/omsp_execution_unit.v
/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/openMSP430.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430/omsp_dbg.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430/omsp_execution_unit.v
/openmsp430/trunk/fpga/altera_de1_board/rtl/verilog/openmsp430/openMSP430.v
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/openmsp430/omsp_dbg.v
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/openmsp430/omsp_execution_unit.v
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/openmsp430/openMSP430.v
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/leds.bit
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/leds.mcs
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/openMSP430_fpga.bit
/openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/openmsp430/omsp_dbg.v
/openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
/openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/openmsp430/omsp_execution_unit.v
/openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/openmsp430/openMSP430.v

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