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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [bench/] - Rev 98

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Last modification

  • Rev 98, 2011-02-28 20:20:51 GMT
  • Author: olivier.girard
  • Log message:
    Added support for VCS verilog simulator.
    VPD and TRN waveforms can now be generated.

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