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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] - Rev 86

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Last modification

  • Rev 86, 2011-01-28 22:53:28 GMT
  • Author: olivier.girard
  • Log message:
    Update serial debug interface test patterns to make them work with all program memory configurations.

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