URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] - Rev 483

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

Rev 483, 2011-01-24 00:35:27 GMT
Author: julius
Log message:
ORPSoC OR1200 update. Adding parity testbench and generic fault tolerance testing build.

Path
/openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/board/include/board.h
/openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/sw/Makefile.inc
/openrisc/trunk/orpsocv2/boards/generic
/openrisc/trunk/orpsocv2/boards/generic/ft
/openrisc/trunk/orpsocv2/boards/generic/ft/backend
/openrisc/trunk/orpsocv2/boards/generic/ft/backend/rtl
/openrisc/trunk/orpsocv2/boards/generic/ft/backend/rtl/verilog
/openrisc/trunk/orpsocv2/boards/generic/ft/backend/rtl/verilog/dummy.v
/openrisc/trunk/orpsocv2/boards/generic/ft/bench
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/include
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/include/orpsoc-testbench-defines.v
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/include/timescale.v
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/or1200_ft_stim.v
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/or1200_monitor.v
/openrisc/trunk/orpsocv2/boards/generic/ft/bench/verilog/orpsoc_testbench.v
/openrisc/trunk/orpsocv2/boards/generic/ft/doc
/openrisc/trunk/orpsocv2/boards/generic/ft/doc/README
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/arbiter
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/arbiter/arbiter_bytebus.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/arbiter/arbiter_dbus.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/arbiter/arbiter_ibus.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/clkgen
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/clkgen/clkgen.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/clkgen/README
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/include
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/include/orpsoc-defines.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/include/orpsoc-params.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/orpsoc_top
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/orpsoc_top/orpsoc_top.v
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/parity_err_handler
/openrisc/trunk/orpsocv2/boards/generic/ft/rtl/verilog/parity_err_handler/parity_err_handler.v
/openrisc/trunk/orpsocv2/boards/generic/ft/sim
/openrisc/trunk/orpsocv2/boards/generic/ft/sim/bin
/openrisc/trunk/orpsocv2/boards/generic/ft/sim/bin/Makefile
/openrisc/trunk/orpsocv2/boards/generic/ft/sim/out
/openrisc/trunk/orpsocv2/boards/generic/ft/sim/run
/openrisc/trunk/orpsocv2/boards/generic/ft/sim/run/Makefile
/openrisc/trunk/orpsocv2/boards/generic/ft/sw
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/board
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/board/include
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/board/include/board.h
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/Makefile.inc
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/tests
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/tests/or1200ft
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/tests/or1200ft/sim
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/tests/or1200ft/sim/Makefile
/openrisc/trunk/orpsocv2/boards/generic/ft/sw/tests/or1200ft/sim/or1200ft-parity.c
/openrisc/trunk/orpsocv2/doc/orpsoc.texi
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_cpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dc_ram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dc_tag.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dc_top.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dmmu_tlb.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dmmu_top.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ic_ram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ic_tag.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ic_top.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_immu_tlb.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_immu_top.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_parity_chk.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_rf.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_spram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_spram_32_bw.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_top.v
/openrisc/trunk/orpsocv2/sw/drivers/or1200/crt0.S
/openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-dctest.c
/openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-mmu.c

Browse

Tools

Subversion Repositories openrisc_me

[/] [openrisc/] - Rev 483

Last modification