OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [testfloat/] - Rev 346

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 346, 2010-09-07 11:55:53 GMT
  • Author: jeremybennett
  • Log message:
    Changes to support Or1ksim 0.5.0rc1

    Top level changes:

    * config.h.in: Regenerated.
    * debug.cfg, rsp.cfg: Deleted.
    * doc/or1ksim.texi: Updated for new options and library interface.
    * doc/or1ksim.info, doc/version.texi: Regenerated.
    * Makefile.am: Added sim.cfg to EXTRA_DIST.
    * NEWS: Updated for 0.5.0rc1.
    * or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
    * sim.cfg: Updated for consistency with the user guide.
    * sim-config.c (init_defconfig): 50000 as default VAPI port.
    (alloc_memory_block): Verbose message of amount allocated.
    * configure: Regenerated.
    * configure.ac: Version changed to 0.5.0rc1.

    Changes in testsuite:

    * libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
    between interrupts to 2ms.
    <int-edge simple 2>: Increase time between interrupts to 2ms.
    <int-edge duplicated 1>: Increase time between interrupts to 2ms.
    <int-edge duplicated 2>: Increase time between interrupts to 2ms.

    Changes in testsuite/test-code-or1k:

    * mc-common/except-mc.S: Remove leading underscores from global
    symbols.
    * except/except.S: Remove leading underscores from global symbols.
    * cache/cache-asm.S: Remove leading underscores from global symbols.
    * cache/cache.c (jump_and_link): Remove leading underscore from
    label.
    (jump): Remove leading underscore from label.
    (all): Remove leading underscore from global symbol references.
    * testfloat/systfloat.S: Remove leading underscores from global
    symbols.
    * mmu/mmu.c (jump): Remove leading underscore from label.
    * mmu/mmu-asm.S: Remove leading underscores from global symbols.
    * except-test/except-test.c: Remove leading underscores from
    global symbols.
    * except-test/except-test-s.S: Remove leading underscores from
    global symbols.
    * uos/except-or32.S: Remove leading underscores from global
    symbols.
    * configure: Regenerated.
    * configure.ac: Version changed to 0.5.0rc1.
Path
/openrisc/trunk/or1ksim/aclocal.m4
/openrisc/trunk/or1ksim/argtable2/Makefile.in
/openrisc/trunk/or1ksim/bpb/Makefile.in
/openrisc/trunk/or1ksim/cache/Makefile.in
/openrisc/trunk/or1ksim/ChangeLog
/openrisc/trunk/or1ksim/config.h.in
/openrisc/trunk/or1ksim/configure
/openrisc/trunk/or1ksim/configure.ac
/openrisc/trunk/or1ksim/cpu/common/Makefile.in
/openrisc/trunk/or1ksim/cpu/dlx/Makefile.in
/openrisc/trunk/or1ksim/cpu/Makefile.in
/openrisc/trunk/or1ksim/cpu/or1k/Makefile.in
/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
/openrisc/trunk/or1ksim/cuc/Makefile.in
/openrisc/trunk/or1ksim/debug.cfg
/openrisc/trunk/or1ksim/debug/Makefile.in
/openrisc/trunk/or1ksim/doc/Makefile.in
/openrisc/trunk/or1ksim/doc/or1ksim.info
/openrisc/trunk/or1ksim/doc/or1ksim.texi
/openrisc/trunk/or1ksim/doc/version.texi
/openrisc/trunk/or1ksim/Makefile.am
/openrisc/trunk/or1ksim/Makefile.in
/openrisc/trunk/or1ksim/mmu/Makefile.in
/openrisc/trunk/or1ksim/NEWS
/openrisc/trunk/or1ksim/or1ksim.h
/openrisc/trunk/or1ksim/peripheral/channels/Makefile.in
/openrisc/trunk/or1ksim/peripheral/Makefile.in
/openrisc/trunk/or1ksim/pic/Makefile.in
/openrisc/trunk/or1ksim/pm/Makefile.in
/openrisc/trunk/or1ksim/port/Makefile.in
/openrisc/trunk/or1ksim/rsp.cfg
/openrisc/trunk/or1ksim/sim-config.c
/openrisc/trunk/or1ksim/sim.cfg
/openrisc/trunk/or1ksim/softfloat/Makefile.in
/openrisc/trunk/or1ksim/support/Makefile.in
/openrisc/trunk/or1ksim/testsuite/ChangeLog
/openrisc/trunk/or1ksim/testsuite/config/Makefile.in
/openrisc/trunk/or1ksim/testsuite/lib/Makefile.in
/openrisc/trunk/or1ksim/testsuite/libsim.tests/int-edge.exp
/openrisc/trunk/or1ksim/testsuite/libsim.tests/Makefile.in
/openrisc/trunk/or1ksim/testsuite/Makefile.in
/openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/aclocal.m4
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-gpio/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-uart/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/basic/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/cache-asm.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/cache.c
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cbasic/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/cfg/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/config.h.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/dhry/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/dmatest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/except-test-s.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/except-test.c
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/except.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/exit/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/ext/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/fbtest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/flag/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/functest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-logger/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/kbdtest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/local-global/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/loop/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/except-mc.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mem-test/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/mmu-asm.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/mmu.c
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/mycompress/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/testfloat/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/testfloat/systfloat.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/tick/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/except-or32.S
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code-or1k/upcalls/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-iftest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-inttest/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/lib-upcalls/Makefile.in
/openrisc/trunk/or1ksim/testsuite/test-code/Makefile.in
/openrisc/trunk/or1ksim/tick/Makefile.in
/openrisc/trunk/or1ksim/vapi/Makefile.in

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.