URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] - Rev 57

Rev 57, 2009-11-24 12:48:15 GMT
Author: julius
Log message:
ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words

Path
/openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp
/openrisc/trunk/orpsocv2/bench/verilog/or1200_monitor.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200_defines.v
/openrisc/trunk/orpsocv2/sim/bin/Makefile