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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [bench/] [verilog/] [include/] - Rev 411

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Last modification

  • Rev 411, 2010-11-04 13:09:21 GMT
  • Author: julius
  • Log message:
    Improved ethmac testbench and software.

    Renamed some OR1200 library functions to be more generic.

    Fixed bug with versatile_mem_ctrl for Actel board.

    Added ability to simulate gatelevel modules alongside RTL modules
    in board build.

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