URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [atlys/] [bench/] [verilog/] - Rev 868

Rev 631, 2011-08-24 03:28:24 GMT
Author: stekern
Log message:
orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

Path
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/ddr2_model.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/ddr2_model_parameters.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/ddr2_model_preload.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/eth_phy_defines.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/eth_stim.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/synthesis-defines.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/include/timescale.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/or1200_monitor.v
/openrisc/trunk/orpsocv2/boards/xilinx/atlys/bench/verilog/orpsoc_testbench.v