URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [bench/] - Rev 486

Rev 482, 2011-01-19 07:04:19 GMT
Author: julius
Log message:
ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes.

Path
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/verilog/include/eth_stim.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/ethmac_defines.v
/openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_fifo.v
/openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_wishbone.v
/openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dc_ram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dc_tag.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dmmu_tlb.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ic_ram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ic_tag.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_immu_tlb.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_parity_chk.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_parity_gen.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_rf.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_spram.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_spram_32_bw.v
/openrisc/trunk/orpsocv2/rtl/verilog/orpsoc_top/orpsoc_top.v
/openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c
/openrisc/trunk/orpsocv2/sw/drivers/uart/uart.c