URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] - Rev 49

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

Rev 49, 2009-09-12 20:25:34 GMT
Author: julius
Log message:
Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update

Path
/openrisc/trunk/orpsocv2/bench/sysc/include/Or1200MonitorSC.h
/openrisc/trunk/orpsocv2/bench/sysc/include/OrpsocAccess.h
/openrisc/trunk/orpsocv2/bench/sysc/include/TraceSC.h
/openrisc/trunk/orpsocv2/bench/sysc/src/Modules.make
/openrisc/trunk/orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp
/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocAccess.cpp
/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp
/openrisc/trunk/orpsocv2/bench/sysc/src/TraceSC.cpp
/openrisc/trunk/orpsocv2/bench/verilog/eth_phy.v
/openrisc/trunk/orpsocv2/bench/verilog/eth_phy_defines.v
/openrisc/trunk/orpsocv2/bench/verilog/eth_stim.v
/openrisc/trunk/orpsocv2/bench/verilog/or1200_monitor.v
/openrisc/trunk/orpsocv2/bench/verilog/orpsoc_testbench.v
/openrisc/trunk/orpsocv2/bench/verilog/smii_phy.v
/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/gdb.c
/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/gdb.h
/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/rsp-rtl_sim.c
/openrisc/trunk/orpsocv2/bench/verilog/vpi/c/rsp-rtl_sim.h
/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog/vpi_debug_module.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/debug_if/dbg_cpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_cfgr.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_ctrl.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_du.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_except.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_genpc.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_ic_ram.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/smii/smii_txrx.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200_defines.v
/openrisc/trunk/orpsocv2/sim/bin/Makefile
/openrisc/trunk/orpsocv2/sw/dhry/dhry.c
/openrisc/trunk/orpsocv2/sw/dhry/Makefile
/openrisc/trunk/orpsocv2/sw/support/except.S
/openrisc/trunk/orpsocv2/sw/support/int.c
/openrisc/trunk/orpsocv2/sw/support/Makefile
/openrisc/trunk/orpsocv2/sw/support/orp.ld
/openrisc/trunk/orpsocv2/sw/support/support.c
/openrisc/trunk/orpsocv2/sw/support/support.h
/openrisc/trunk/orpsocv2/sw/support/time.c
/openrisc/trunk/orpsocv2/sw/support/time.h

Browse

Tools

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] - Rev 49

Last modification