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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] [bin/] - Rev 58

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Last modification

  • Rev 58, 2009-11-29 16:46:29 GMT
  • Author: julius
  • Log message:
    ORPSoC2 update - added fpu and implemented in processor, also some sw tests for it, makefile for event sims cleaned up
Path
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/add_sub27.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/div_r2.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/except.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/fcmp.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/fpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/mul_r2.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/post_norm.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/pre_norm.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/fpu/pre_norm_fmul.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_cpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_ctrl.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_du.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_except.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_fpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_freeze.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_sprs.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_top.v
/openrisc/trunk/orpsocv2/rtl/verilog/components/or1200r2/or1200_wbmux.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200_defines.v
/openrisc/trunk/orpsocv2/sim/bin/icarus.scr
/openrisc/trunk/orpsocv2/sim/bin/Makefile
/openrisc/trunk/orpsocv2/sim/bin/modelsim.scr
/openrisc/trunk/orpsocv2/sim/bin/or1ksim-orpsocv2.cfg
/openrisc/trunk/orpsocv2/sim/bin/verilator.scr
/openrisc/trunk/orpsocv2/sw/basic/basic.S
/openrisc/trunk/orpsocv2/sw/cbasic/cbasic.c
/openrisc/trunk/orpsocv2/sw/cust/cust.c
/openrisc/trunk/orpsocv2/sw/dhry/dhry.c
/openrisc/trunk/orpsocv2/sw/dhry/Makefile
/openrisc/trunk/orpsocv2/sw/eth/eth-basic.c
/openrisc/trunk/orpsocv2/sw/eth/eth-int.c
/openrisc/trunk/orpsocv2/sw/eth/except.S
/openrisc/trunk/orpsocv2/sw/except/except_test.c
/openrisc/trunk/orpsocv2/sw/fpu
/openrisc/trunk/orpsocv2/sw/fpu/fpu.S
/openrisc/trunk/orpsocv2/sw/fpu/Makefile
/openrisc/trunk/orpsocv2/sw/icm/icm.S
/openrisc/trunk/orpsocv2/sw/mul/Makefile
/openrisc/trunk/orpsocv2/sw/mul/mul.c
/openrisc/trunk/orpsocv2/sw/support/except.S
/openrisc/trunk/orpsocv2/sw/support/fp.c
/openrisc/trunk/orpsocv2/sw/support/Makefile
/openrisc/trunk/orpsocv2/sw/support/spr_defs.h
/openrisc/trunk/orpsocv2/sw/support/support.c
/openrisc/trunk/orpsocv2/sw/support/support.h
/openrisc/trunk/orpsocv2/sw/support/syscall.c
/openrisc/trunk/orpsocv2/sw/uart/Makefile
/openrisc/trunk/orpsocv2/sw/uart/uart.c

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