OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [lib/] - Rev 868

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 655, 2011-10-22 20:32:59 GMT
  • Author: julius
  • Log message:
    ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation
Path
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_BankLib.h
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_CUIcommandData.h
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_data.h
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_def.h
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_TimingData.h
/openrisc/trunk/orpsocv2/bench/verilog/include/cfi_flash_UserData.h
/openrisc/trunk/orpsocv2/bench/verilog/x28fxxxp30.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/par/bin/Makefile
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/par/bin/ml501.ucf
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/bench/verilog/orpsoc_testbench.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/arbiter/arbiter_dbus.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/arbiter/arbiter_ibus.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/orpsoc-defines.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/orpsoc-params.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/orpsoc_top/orpsoc_top.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sw/board/include/board.h
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/syn/xst/bin/Makefile
/openrisc/trunk/orpsocv2/doc/orpsoc.texi
/openrisc/trunk/orpsocv2/rtl/verilog/cfi_ctrl
/openrisc/trunk/orpsocv2/rtl/verilog/cfi_ctrl/cfi_ctrl.v
/openrisc/trunk/orpsocv2/rtl/verilog/cfi_ctrl/cfi_ctrl_engine.v
/openrisc/trunk/orpsocv2/rtl/verilog/ram_wb/ram_wb_b3.v
/openrisc/trunk/orpsocv2/scripts/make/Makefile-sim-definesgen.inc
/openrisc/trunk/orpsocv2/scripts/make/Makefile-swrules.inc
/openrisc/trunk/orpsocv2/sw/apps/cfi_ctrl_programmer
/openrisc/trunk/orpsocv2/sw/apps/cfi_ctrl_programmer/cfi_ctrl_programmer.c
/openrisc/trunk/orpsocv2/sw/apps/cfi_ctrl_programmer/cfi_ctrl_programmer.ld
/openrisc/trunk/orpsocv2/sw/apps/cfi_ctrl_programmer/Makefile
/openrisc/trunk/orpsocv2/sw/drivers/cfi-ctrl
/openrisc/trunk/orpsocv2/sw/drivers/cfi-ctrl/cfi_ctrl.c
/openrisc/trunk/orpsocv2/sw/drivers/cfi-ctrl/include
/openrisc/trunk/orpsocv2/sw/drivers/cfi-ctrl/include/cfi_ctrl.h
/openrisc/trunk/orpsocv2/sw/drivers/cfi-ctrl/Makefile
/openrisc/trunk/orpsocv2/sw/lib/Makefile
/openrisc/trunk/orpsocv2/sw/Makefile.inc
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/board
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/board/cfi_ctrl-readid.c
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/board/cfi_ctrl-simple.c
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/board/Makefile
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/sim
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/sim/cfi_ctrl-readid.c
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/sim/cfi_ctrl-simple.c
/openrisc/trunk/orpsocv2/sw/tests/cfi_ctrl/sim/Makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.