URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [branch_qmem/] [or1200/] [rtl/] [verilog/] - Rev 1033

Rev 1033, 2002-09-07 19:16:10 GMT
Author: lampret
Log message:
If SR[CY] implemented with OR1200_IMPL_ADDC enabled, l.add/l.addi also set SR[CY].

Path
/trunk/or1200/rtl/verilog/or1200_alu.v
/trunk/or1200/rtl/verilog/or1200_defines.v